mds 354 b 1 revision 021202 integrated circuit systems, inc. ?525 race street ?san jose, ca, 95126 ?408) 295-9800tel?www.icst.com ics354 triple pll quick turn clock synthesizer ?packaged as 16 pin tssop ?quick turn frequency programming allows samples as quickly as one day ?up to 2 outputs can be low-skew ?spread-spectrum capability included ?can include 5 selectable output frequencies ?up to 3 reference outputs ?replaces multiple crystals and oscillators ?output frequencies up to 200 mhz at 3.3v ?input crystal frequency of 5 - 27 mhz ?input clock frequency of 2 - 50 mhz ?duty cycle of 45/55 ?operating voltage of 3.3 v or 5 v ?advanced, low power cmos process the ics354 qtclock generates up to 5 high quality, high frequency clock outputs including a reference from a low frequency crystal or clock input. it is designed to replace crystals and crystal oscillators in most electronic systems. the ics354 contains a one time programmable (otp) rom which is factory programmed with pll divider values to output a broad range of frequencies up to 200 mhz, allowing customer requests for different frequencies to be shipped in 1-3 days. programming features include a selectable frequency table, two low-skew outputs, and optional spread spectrum on plla. using phase-locked-loop (pll) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. it can replace multiple crystals and oscillators, saving board space and cost. block diagram description features crystal or clock input otp rom with pll divider values plla spread spectrum pllb pllc crystal oscillator divide logic and output control clk1 clk2 clk3 clk4 clk5 pdts (all outputs and plls) x1/iclk x2 capacitors are required with a crystal input. s2:s0 3
mds 354 b 2 revision 021202 integrated circuit systems, inc. ?525 race street ?san jose, ca, 95126 ?408) 295-9800tel?www.icst.com ics354 triple pll quick turn clock synthesizer pin assignments number name type description 1 x1/iclk xi crystal connection. connect to fundamental mode crystal or clock input. 2 s0 i select pin 0 for frequency table/chip control. internal pull-up resistor. 3 s1 i select pin 1 for frequency table/chip control. internal pull-up resistor. 4 clk5 o clock output. 5 vdd p connect to +3.3v or +5v. must be same voltage as pins 12 and 15. 6 gnd p connect to ground. 7 clk1 o clock output. 8 clk2 o clock output. 9 clk4 o clock output. 10 clk3 o clock output. 11 gnd p connect to ground. 12 vdd p connect to +3.3v or +5v. must be same voltage as pins 5 and 15. 13 s2 i select pin 2 for frequency table/chip control. internal pull-up resistor. 14 pdts i all-chip power down when low. note 1. internal pull-up resistor. 15 vdd p connect to +3.3v or +5v. must be same voltage as pins 5 and 12. 16 x2 xo crystal connection. leave unconnected for clock input. pin descriptions key: xi, xo = crystal connections, i = input, o = output, p = power supply connection note 1: all outputs are internally high impedance with a weak internal pull-down resistor. when pdts is active, it is possible to overdrive the output pins for board-level testing. 1 12 2 3 4 11 10 9 clk5 s0 vdd 16 pin tssop 5 6 7 8 vdd s1 x1/iclk x2 s2 clk2 clk1 14 13 15 16 gnd vdd clk4 clk3 gnd pdts
mds 354 b 3 revision 021202 integrated circuit systems, inc. ?525 race street ?san jose, ca, 95126 ?408) 295-9800tel?www.icst.com ics354 triple pll quick turn clock synthesizer external components / crystal selection the ics354 requires a 0.01? decoupling capacitor to be connected between vdd and gnd on pins 5 and 6, and another between pins 12 and 11. these must be connected close to the ics354 to minimize lead inductance. no external power supply filtering is required for this device. a 33 w series terminating resistor can be used next to each clk pin. for a crystal input, a parallel resonant, fundamental mode crystal should be used. crystal capacitors must be connected from each of the pins x1 and x2 to ground. the value (in pf) of these crystal caps should equal (c l -6pf)*2, where c l is the crystal load capacitance in pf. as an example, for a crystal with 16 pf load capacitance, each crystal capacitor would be 20 pf [(16 - 6pf)*2 = 20]. for a clock input, connect to x1/iclk and leave x2 unconnected (no capacitors on either x1 or x2). frequency select table the ics354 can be configured so that one pll provides up to 4 frequency selections. for example, cpu frequencies of 66.7 mhz, 100.0 mhz, 133.3 mhz, and 166.7 mhz could be included. this information should be indicated on the order form when the ics354 is initially defined. device configuration the ics354 qtclock provides the facility for up to 5 clock outputs. the outputs are derived from either the reference input or from one of the 3 plls. all chip functions are controlled from an otp rom which has 3 input control lines (s2, s1, s0), giving a total of 8 address locations. each address location gives control of the following: 1) each output can be turned off individually. 2) the internal dividers for each pll are controlled to generate any required frequency. 3) each pll can be turned off (powered down) individually. 4) the spread spectrum function available on plla can be enabled or disabled. 5) the output divide and control logic can be configured to bring the appropriate clock to the correct pin. 6) up to two low skew copies of the same clock can be enabled. this chip architecture provides the user with unrivaled flexibility. for example, one of the input pins could be dedicated to enabling/disabling spread spectrum, a second could be used to control the power of the chip by shutting down plls and outputs when not used. the third could be used to change the output clock frequencies. the specification is complete when the ics354 qtclock order form accompanies this data sheet. the order form lists the input and clk actual frequencies, as well as any other available options. this unique configuration is given a two character alphanumeric programming code (ics354-xx), which must be specified when referring to samples.
mds 354 b 4 revision 021202 integrated circuit systems, inc. ?525 race street ?san jose, ca, 95126 ?408) 295-9800tel?www.icst.com ics354 triple pll quick turn clock synthesizer parameter conditions minimum typical maximum units absolute maximum ratings (stresses beyond these can permanently damage the device) absolute maximum ratings (stresses beyond these can permanently damage the device) absolute maximum ratings (stresses beyond these can permanently damage the device) absolute maximum ratings (stresses beyond these can permanently damage the device) absolute maximum ratings (stresses beyond these can permanently damage the device) absolute maximum ratings (stresses beyond these can permanently damage the device) supply voltage, vdd referenced to gnd 7 v inputs referenced to gnd -0.5 vdd+0.5 v clock output referenced to gnd -0.5 vdd+0.5 v ambient operating temperature commercial version 0 70 ? ambient operating temperature industrial version -40 85 ? soldering temperature max of 10 seconds 260 ? storage temperature -65 150 ? dc characteristics (vdd = 3.3v unless otherwise noted) dc characteristics (vdd = 3.3v unless otherwise noted) dc characteristics (vdd = 3.3v unless otherwise noted) operating voltage, vdd 3.13 5.5 v input high voltage, vih, iclk only iclk (pin 1) (vdd/2)+1 v input low voltage, vil, iclk only iclk (pin 1) (vdd/2)-1 v input high voltage, vih pdts, s0, s1, s2 2 v input low voltage, vil pdts, s0, s1, s2 0.8 v output high voltage, voh ioh=-4ma vdd-0.4 v output high voltage, voh ioh=-25ma 2.4 v output low voltage, vol iol=25ma 0.4 v idd operating supply current, 20 mhz crystal no load, 100mhz 20 ma short circuit current clk output ?0 ma on-chip pull-up resistor, inputs tbd k w on-chip pull-down resistor, outputs tbd w input capacitance, inputs 4 pf ac characteristics (vdd = 3.3v unless otherwise noted) ac characteristics (vdd = 3.3v unless otherwise noted) ac characteristics (vdd = 3.3v unless otherwise noted) input frequency, crystal input 5 27 mhz input frequency, clock input 2 50 mhz output frequency 2 200 mhz output clock rise time 0.8 to 2.0v 1 ns output clock fall time 2.0 to 0.8v 1 ns output clock duty cycle (note 1) at vdd/2 45 49 to 51 55 % absolute clock period jitter deviation from mean ?bd ps one sigma clock period jitter tbd ps pin to pin skew low skew outputs -250 250 ps power-up time, pdts goes high until clk out 8 20 ms electrical specifications note 1: these are typical values. the actual minimum and maximum duty cycle limits are shown on the ics354 qtclock order form for each programmed version.
mds 354 b 5 revision 021202 integrated circuit systems, inc. ?525 race street ?san jose, ca, 95126 ?408) 295-9800tel?www.icst.com ics354 triple pll quick turn clock synthesizer while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, inc. (ics) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patents, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. ordering information qtclock is a trademark of ics xx represents a 2 character alphanumeric programming code assigned by the factory, which indicates the output frequencies on all clks and other features. all samples are shipped with an ics354 order form describing the characteristics of the device. package outline and package dimensions (for current dimensional specifications, see jedec publication no. 95.) part/order number marking package shipping temperature ics354g-xx ics354g-xx 16 pin tssop tubes 0 to 70 ? ics354g-xxt ics354g-xx 16 pin tssop tape and reel 0 to 70 ? ics354g-xxi ics354g-xxi 16 pin tssop tubes -40 to 85 ? ics354g-xxit ics354g-xxi 16 pin tssop tape and reel -40 to 85 ? inches inches millimeters millimeters symbol min max min max a -- 0.047 -- 1.20 a1 0.002 0.006 0.05 0.15 b 0.007 0.012 0.19 0.30 c 0.0035 0.008 0.09 0.20 d 0.193 0.201 4.90 5.10 e .0256 bsc .0256 bsc 0.65 bsc 0.65 bsc e .252 bsc .252 bsc 6.40 bsc 6.40 bsc e1 0.169 0.177 4.30 4.50 l 0.018 0.030 0.45 0.75 16 pin tssop b d e1 e e a1 c a l index area 1 2
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